In a conventional analog-to-digital converter, an analog signal is converted to a number of bits, typically between 4 bits and 10 bits. The number of bits in digital may be determined by a number of factors, which include the accuracy and precision required, the cost of components, the required processing speed, available chip real-estate, and the like.
Various types of systems have been provided in the prior art for converting an input analog voltage to digital signals (currents or voltages) representative of such input analog voltage. One type of system, very often used in the prior art to provide such conversion, is known as a flash converter. In a flash converter, an analog input signal (representing the analog value to be converted digitally) is introduced to a first input of a differential amplifier in each of multiple of repetitive cells. An individual one of a plurality of progressive fractions in a reference voltage is introduced to a second input of a respective differential amplifier.
A subranging analog to digital converter (ADC) architecture is suitable for implementing high-performance ADC's. The demand for low-power devices and the ever increasing operation frequencies in ADC calls for ADC designs with a reduced number of power consuming comparators, such as a subranging ADC. In a flash ADC, a common technique is used to convert an analog input signal into an eight bit (8-b) digital output code. In general, flash, folding and subranging ADCs use cascades of distributed amplifiers to amplify the residue flash, folding and subranging ADCs use cascades of distributed amplifiers to amplify the residue signals before they are applied to comparators. These residue signals are obtained by subtracting different DC reference voltages from an input signal V.sub.in. The DC reference voltages are generated by the resistive ladder biased at a certain DC current. Two implementation aspects of averaging that should be distinguished are circuit implementation and topology.
With respect to circuit implementation, various ideas have been published in the literature, e.g., connecting resistors between amplifier outputs, and connecting capacitors between amplifier inputs. Interpolation is a type of averaging, and additional published techniques include capacitive interpolation, active interpolation using differential pairs, active interpolation using current mirrors, and active interpolation using current splitting.
Alternatively, in bipolar technology, the folding and interpolation technique has proven to be successful for high sample rates. Several references investigate the possibilities of usage of this technique in CMOS. The major advantage of folding and interpolation lies in the field of high sample rate in combination with low power consumption and small chip area. The folding converter requires little power to drive the input, compared to other converters. For similar reasons the power consumption of the reference ladder of the folding converter can be kept low.